Date & Time: 
Wed, 12/04/2019 - 11:30am
Mahesh Mehendale
Nano-power Foundational Technology at Kilby Labs, Texas Instruments

Discovery Park F285


Deep Neural Networks (DNNs) have emerged as the promising machine learning technology for a number of inferencing/classification problems including object detection, face recognition, gesture recognition, voice command recognition, sound signature detection, anomaly detection etc. For always-on sensor node applications, where the events of interest occur infrequently, there is a need to detect events locally at the end-node as against the cloud, so as to reduce network traffic, operate with no or unreliable connectivity, enhance privacy (only event information sent to the cloud as against raw data) and reduce response-time. DNNs however are compute and data intensive, so implementing them on end-nodes under aggressive cost, power and latency constraints is a big challenge. In this talk we address the challenge of cost and power optimized DNN realizations while meeting the accuracy and latency requirements of the target application. Our analysis shows that 2-3 orders of magnitude reduction in die size * power  metric is needed to make ML at the Edge a reality. We present multiple techniques spanning system, algorithm, architecture, design, circuit and technology level optimizations to address this challenge. We also highlight open problems/areas of further research to keep pushing the envelope.

Mahesh Mehendale

Mahesh Mehendale is a TI Fellow and leads the Nano-power Foundational Technology at Kilby Labs, Texas Instruments. His current areas of focus include ultra-low power circuits and micro-architectures for “always-on” sensor nodes. Before this, he worked on architectures for low-power micro-controllers and high-definition (HD) video compression. Since joining TI in 1986, he has led the development of multiple industry-leading digital and system-on-chip (SoC) designs, including C27x/C28x DSPs and DM642 digital media processor. Mahesh completed his B.Tech. in Electrical Engineering in 1984, M.Tech. and Ph.D. in Computer Science and Engineering in 1986 and 2000, respectively, from the Indian Institute of Technology, Bombay, India. He has published more than 50 papers at international conferences/journals and presented many invited talks/tutorials. He has co-authored a book on "VLSI synthesis of DSP kernels" and two book chapters. Mahesh holds 14 U.S. patents with 6 more applications pending, and was elected senior member of IEEE in 2000. He received the Distinguished Alumnus award from Indian Institute of Technology (IIT) Bombay in 2012, the Zinnov Award for Thought Leadership in 2014 and was elected Fellow of the Indian National Academy of Engineers in 2016.


Computer Science and Engineering